CPU simulation: Difference between revisions

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Your solution must explain how a CPU functions. Everything must be explicit and clear. Please reference this IB standard for this problem set: Explain the machine instruction cycle.
Your solution must explain how a CPU functions. Everything must be explicit and clear. Please reference this IB standard for this problem set: Explain the machine instruction cycle.


Please carefully read and understand [[Model and a simulation|this article on modelling and simulation]].
* Please carefully read and understand [[Computer modeling|this article on computer modelling]]
* Please carefully read and understand [[Model and a simulation|this article on modelling and simulation]].


== How you will be assessed ==
== How you will be assessed ==

Revision as of 06:49, 13 September 2021

This a problem set for you to work through [1]

This is a problem set. Some of these are easy, others are far more difficult. The purpose of these problems sets are:

  1. to build your skill applying computational thinking to a problem
  2. to assess your knowledge and skills of different programming practices

What is this problem set trying to do[edit]

You must demonstrate your understanding of the function and architecture of a CPU by creating a simulation of the CPU. Please look at this for an example of ABOUT what I'm looking for. Please also visit our page on Computer organization. Please read this problem set very carefully. You do NOT need to build a graphical user interface!!

The Problem[edit]

Construct a simulation of a CPU. Your simulation must model and simulate:

  1. a data structure representing the ALU - The arithmetic logic unit executes all calculations within the CPU
  2. a data structure representing the CU - control unit, coordinates how data moves around
  3. a data structure representing the PC - program counter - stores address of the -> next <- instruction in RAM
  4. a data structure representing the MAR - memory address register - stores the address of the current instruction being executed
  5. a data structure representing the MDR - memory data register - stores the data that is to be sent to or fetched from memory
  6. a data structure representing the CIR - current instruction register - stores actual instruction that is being decoded and executed
  7. a data structure representing the ACC - accumulator - stores result of calculations
  8. a data structure representing the address bus - carries the ADDRESS of the instruction or data
  9. a data structure representing the data bus - carries data between processor and the memory
  10. a data structure representing the control bus - sends control signals such as: memory read, memory write
  11. a data structure representing primary memory. You need to represent address and data/instruction space
  12. a clear representation and visible functioning of the machine instruction cycle
  13. you should represent clock cycles
  14. you should represent a simple set of instructions being fully executed (fetched, execute store)

Your solution must explain how a CPU functions. Everything must be explicit and clear. Please reference this IB standard for this problem set: Explain the machine instruction cycle.

How you will be assessed[edit]

Your solution will be graded using the following axis:

Scope

  • To what extent does your code implement the features required by our specification?
  • To what extent is there evidence of effort?

Correctness

  • To what extent did your code meet specifications?
  • To what extent is your code free of bugs?

Design

  • To what extent is your code written well (i.e. clearly, efficiently, elegantly, and/or logically)?
  • To what extent is your code eliminating repetition?
  • To what extent is your code using functions appropriately?

Style

  • To what extent is your code readable?
  • To what extent is your code commented?
  • To what extent are your variables well named?

References[edit]

A possible solution[edit]

Click the expand link to see one possible solution, but NOT before you have tried and failed!

not yet!